Design Verification Engineer

3 weeks ago

Cork, Cork, Ireland European Tech Recruit Full time
Design Verification Engineer - SOC/ASIC (Semicon/Software/Wireless) - Visas Supported

European Tech Recruit

Cork

EUR 100,000 - 125,000

An exciting career opportunity for an experienced Verification Engineer to join a Global Leading Semiconductor company, where you will lead a thriving CPU team at their R&D Centre in Cork, Ireland.

As The Lead Design Verification Engineer, you will work with Chip Architects to validate the concepts of CPU and SOC level micro-architectures. You will work on a selected part of the CPU Design Verification, collaborating with cross-functional groups to determine the product's execution path and to ensure that it functions to the standards of being launch ready.

What will you be doing?

  1. Leading and mentoring the local Design and Verification teams.
  2. Working with CPU and SOC Architects to understand the concepts and high-level system requirements.
  3. Developing detailed Test and Coverage plans based on the Architecture and Micro-architecture.
  4. Developing Verification Methodology, ensuring scalability and portability across environments.
  5. Developing Verification environment, including all the respective components such as Stimulus, Checkers, Assertions, Trackers, and Coverage.
  6. Developing Verification Plans and Testbenches for your functional domain.
  7. Executing Verification Plans, including Design Bring-up, DV environment Bring-up, Regressions enabling all features under your care, and Debug of the test failures.
  8. Tracking and reporting DV progress using a variety of metrics, including Bugs and Coverage.

What are we looking for?

  1. Experience in leading a small team of Verification engineers performing CPU Verification.
  2. Deep knowledge of Micro-Processor Verification functions and Architectures, in domains such as: Cache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management.
  3. Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness.
  4. Advance techniques such as: Formal, Assertions, and Silicon bringup, is helpful.
  5. Experience in writing Test plans, portable Testbenches, Transactors, and Assembly code.
  6. Experience with different Verification Methodologies and Tools such as Simulators, Coverage collection, Gate-level Simulation, Waveform viewers, and Formal Proof Tools.
  7. Ability to develop and work independently on a Block/Unit of the design.

Seniority level: Mid-Senior level

Employment type: Full-time

Job function: Design, Engineering, and Information Technology

Industries: Semiconductor Manufacturing, Computers and Electronics Manufacturing, and Computer Hardware Manufacturing

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