(Apply in 3 Minutes) Senior Physical Design Engineer

Overview

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Qualcomm is actively seeking candidates for physical design engineering positions at our Cork, Ireland location. You will be part of a global team that will drive and execute on all phases of the complete physical implementation for the next generation of premium-tier Snapdragon SoCs in bleeding edge technologies.

Responsibilities

- Working on the physical implementation from floorplan to GDS for high-speed complex designs with aggressive PPA targets.
- Taking part in the research of innovative methodologies for pushing the PPA limits in physical design, including the development of scripts and flows.
- Working with cross-functional teams on understanding the design in context of physical implementation, timing closure and power optimization.
- Demonstrating good understanding of and conducts research on industry trends and innovations in physical design to ensure solutions and deliverables align with best practices.
- Performing complex analyses using statistics and data predictions to track benchmarks and identify issues or areas for improvement.
- Working across teams to align on important areas of PPA improvement and ensure targets are met; ensures designs are innovative and compatible with highest standards.

What we’re looking for

- 4+ years of relevant experience in Physical Design.
- Knowledge of entire PD flow from netlist to GDS (Floorplanning, Power planning, Placement/CTS/Routing and corresponding optimization steps).
- Good experience and knowledge of tools for physical design implementation in advanced technology nodes (10nm and below).
- Excellent understanding of STA and timing closure methodologies, including impact on congestion/routing/power.
- Good understanding of power analysis and power integrity analysis.
- Understanding of Physical Verification and DRC closure.
- Expert in automation skills using Perl and TCL and able to develop/support flows related to physical design.
- Good communication skills and ability & desire to work in a cross-functional team environment.

Where you will be working

Cork has a proud reputation as Ireland's second largest economic engine and is now one of the Top 20 location choices in Europe with 39,000 people being employed by over 170 overseas companies. There's a growing diversity in the region with people from many nationalities relocating to Cork, relishing the opportunity to work and live in a location that offers an excellent quality of life. A gateway to Europe, Cork airport provides access to almost 50 international destinations including transatlantic air routes.

Equal Opportunities

We are an Equal Opportunity employer; all qualified applicants will receive consideration for employment without regard to race, colour, religion, sexual orientation, gender identity, national origin, disability, veteran status, or any protected classification.

What’s on Offer

- Salary, stock and performance related bonus
- Maternity/Paternity Leave
- Employee stock purchase scheme
- Matching pension scheme
- Education Assistance
- Relocation and immigration support (if needed)
- Life, Medical, Income and Travel Insurance
- Subsidised memberships for physical and mental well-being
- Bicycle purchase scheme
- Employee run clubs, including running, football, chess, badminton and more

Minimum Qualifications

- Bachelor’s degree in Science, Engineering, or related field with 2+ years of ASIC design, verification, validation, integration, or related work experience.
- OR Master’s degree in Science, Engineering, or related field with 1+ year of ASIC design, verification, validation, integration, or related work experience.
- OR PhD in Science, Engineering, or related field.

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm is committed to providing an accessible process. You may email disability-accommodations@qualcomm.com or call Qualcomm's toll-free number. Qualcomm is also committed to making our workplace accessible for individuals with disabilities.

Qualcomm expects its employees to abide by all applicable policies and procedures, including security and other requirements regarding protection of confidential information.

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