GPU Power Design Verification Expert

2 weeks ago

Cork, Cork, Ireland beBeeVerification Full time €100,000 - €120,000
Senior GPU Power Design Verification Engineer

We are looking for a highly skilled Senior GPU Power Design Verification Engineer to join our team in Cork, Ireland.

About the Role:

  • Collaborate with the Architecture and Design team to understand low power design features and create verification plans.
  • Develop test plan documents for design features and get them reviewed with the design team.
  • Create verification components and testbenches for low power verification and integrate third-party VIPs/UVCs as required.
  • Create a constraint random verification environment using System Verilog and UVM.

Responsibilities:

  • FOLLOW COMPANY DEFINED VERIFICATION METHODOLOGIES.
  • Perform Power Aware Verification in a random verification environment with embedded firmware running on the design.
  • Regress and close the required Low Power coverage metrics to ensure high-quality design.
  • Create portable test setups and verification components that can be reused across simulation and emulation platforms.
  • Perform failure debug involving hardware-software co-debug.
  • Work with tool vendors and push the methodology to improve the verification flows.
  • System level RTL simulation and design verification.
  • Support SoC DV for their integration verification, chip bring-up, and post-silicon debug.

Requirements:

  • Bachelor's degree in Science, Engineering, or a closely related field.
  • 3+ years of hands-on experience in System Verilog, OVM/UVM based constrained random verification.
  • 3+ years in Design validation/Post-Silicon debug.
  • 3+ years of hands-on experience in developing verification components/UVCs and testbenches for RTL verification.
  • 3+ years of hands-on testbench bring-up, integrating third-party VIPs, digital design, verification, debugging, and waveform debug.
  • 2+ years of experience in UPF based Power Aware verification.
  • 2+ years of experience in Functional coverage model development and/or code coverage closure.
  • Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells, and state retention cells.

Desirable Skills:

  • MS degree in Electrical Engineering or equivalent; 8 years of practical experience.
  • Experience with Synopsys NLP (native Low Power) tool.
  • Working knowledge of GLS, PAGLS, and scripting languages such as Perl and Python is a plus.
  • Power Aware Emulation verification experience.
  • Hardware/Software Co-verification.
  • Experience with Low Power coverage metrics collection and coverage closure.
  • Knowledge of GPU/CPU/DDR/Bus preferred.
  • Scripting skills using Python.
  • Formal verification experience (AND/OR) Low Power Formal Verification experience.

Working Model:

  • The company offers a hybrid working model of 3 days onsite and 2 days from home.
  • Well-being and life balance are fundamental.
  • As such, company policy allows employees to blend short-term remote working with annual leave.

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