Senior ASIC Design Verification Expert
2 weeks ago
Job Title: Principal Verification Engineer
We are seeking an experienced ASIC Verification Specialist to join our dynamic team.
As a verification specialist, you will play a crucial role in ensuring the quality and reliability of our cutting-edge semiconductor designs.
Responsibilities:
- Develop and execute comprehensive verification plans.
- Closely verify with coverage closure, ensuring high-quality results.
- Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.
- Testbench Development: Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
- Implement reusable Verification IP (VIP) components.
- Collaborate with third-party VIP providers.
- Develop vertically and horizontally re-usable test-benches.
- Methodology and Flows: Demonstrate a solid understanding of ASIC design and verification methodologies.
- Apply object-oriented programming principles effectively.
- Implement constraint random verification methodology.
- Technical Skills:
- Proficiency in SystemVerilog (OVM/UVM) and other relevant languages (C/C++, Perl, Tcl, Python, Verilog PLI, SV/DPI)
- Familiarity with industry standards (e.g. I2C/SPI/AHB).
- Gate level simulation experience is required.
- Experience with low-power verification using UPF (Unified Power Format) is advantageous.
- Knowledge of formal verification techniques is advantageous.
Requirements:
- Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or related fields.
- Proven track record in complex ASIC verification.
- Passion for solving challenging problems and ensuring product reliability.
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