Mixed-Signal Design Verification Specialist

2 weeks ago

Cork, Cork, Ireland beBeeVerification Full time €84,000 - €142,000
Mixed Signal Design Verification Expert

As a Mixed Signal Design Verification Engineer, you will play a key role in the development of cutting-edge mixed-signal IP designs for next-generation SoCs. Your primary responsibility will be to verify the functionality and integrity of complex digital and analog/mixed-signal components using advanced verification techniques and tools.

  • You will perform SV/UVM-based design verification of SerDes, DDR, and PLL mixed-signal PHY IPs, ensuring they meet the required specifications and standards.
  • Emulation experience is desired, along with expertise in SV/UVM-based simulation, to optimize the verification process and reduce design cycle time.
  • Collaborate closely with cross-functional teams, including analog and digital front-end design groups, to verify RTL and analog/mixed-signal designs in next-generation SerDes, DDR, and PLL IPs.
  • Interact with architecture, design, physical design, software, test, and SoC teams to integrate SerDes, DDR, and PLL IPs into the latest Snapdragon products.
Required Skills and Qualifications
  • Bachelor's degree in Engineering, Computer Science, or related field.
  • Proven experience in design and verification of hardware and software on SoCs and SoC/IP methodologies for verifying complex units using industry-standard tools and technologies.
  • Demonstrated expertise in developing unit and SoC/IP-level test benches using UVM.
  • Constrained random functional verification environment in System Verilog/UVM with excellent debugging skills.
Preferred Qualifications
  • Master's degree in Engineering, Computer Science, or related field.
  • Experience in low power verification using UPF at RTL and GLS simulation level.
  • Experience in Power Aware Gate Level Simulation (GLS) verification flow with zero delay and SDF annotated simulation.

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