Principal Application Engineer
3 weeks ago
Join to apply for the Principal Application Engineer role at Cadence
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world's most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Principal Application Engineer
Location: Cork
Reports to: Sr AE Manager
Job Overview
This position has the exciting challenge of being part of a growing team of Digital Back End Engineers that enable customers to implement design with Cadence tools.
Job Responsibilities
- Understanding of Digital microarchitecture definition and documentation
- Understanding of RTL logic design, debug and functional verification
- Understanding of IP integration and verification
- Understanding of digital architecture trade-offs for power, performance, and area
- Understanding of proper handling of multiple asynchronous clock domains and their crossings
- Understanding of synthesis timing constraints, static timing analysis and constraint development
- Understanding of fundamental physical design flows, e.g. floor planning and clock tree synthesis
- Understanding of the impacts of Analog and mixed-signal design and verification on digital-on-top development flow.
- Understanding of functional ECO flow and conformal ECO
- Experience with FPGA and/or emulation platform
- Firmware development of embedded microcontroller systems is a plus.
- Substantial experience with Verilog is required, as are excellent logic and debug skills.
- Minimum 5 years of ASIC backend design experience.
- Must have gone through successful tapeouts in advance technology nodes
- Be self-motivated and well organized.
Cadence is committed to equal employment opportunity and employment equity throughout all levels of the organization. We strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.
Travel: >10%
We're doing work that matters. Help us solve what others can't.Seniority level
- Seniority levelMid-Senior level
- Employment typeFull-time
- Job functionEngineering and Information Technology
- IndustriesSoftware Development
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