
CPU Micro Architecture Designer
5 days ago
We are seeking an experienced Microprocessor Architect to join our team. In this role, you will be responsible for designing and developing high-performance, low-power microprocessors that meet the needs of next-generation technologies.
You will work closely with cross-functional teams to conceive and implement cutting-edge microarchitectures, leveraging your expertise in instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems.
Requirements- Thorough knowledge of microprocessor architecture including expertise in one or more of the following areas: instruction fetch and decode, branch prediction, instruction scheduling and register renaming, out-of-order execution, integer and floating point execution, load/store execution, prefetching, cache and memory subsystems.
- Knowledge of Verilog and/or VHDL.
- Experience with simulators and waveform debugging tools.
- Knowledge of logic design principles along with timing and power implications.
- Understanding of low power microarchitecture techniques.
- Understanding of high performance techniques and trade-offs in a CPU microarchitecture.
- Experience using a scripting language such as Perl or Python.
- Performance exploration: Explore high performance strategies working with the CPU modelling team.
- Microarchitecture development and specification: From early high-level architectural exploration, through micro architectural research and arriving at a detailed specification.
- RTL ownership: Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
- Functional verification support: Help the design verification team execute on the functional verification strategy.
- Performance verification support: Help verify that the RTL design meets the performance goals.
- Design delivery: Work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.
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