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Senior GPU Power Verification Expert

2 weeks ago

Cork, Cork, Ireland beBeeVerificationEngineer Full time €90,000 - €120,000
About This Opportunity

We are seeking an experienced and skilled GPU Power Verification Engineer to join our team.

Job Description

This role will involve working with the Architecture and Design team to understand low power design features, create verification plans, develop test plan documents for these features, and get them reviewed with the design team.

You will also be responsible for developing verification components and testbenches for low power verification, integrating third-party VIPs/UVCs as required, and creating a constraint random verification environment using System Verilog and UVM.

This will include:

  • Following company-defined verification methodologies
  • Performing Power Aware Verification in a random verification environment with embedded firmware running on the design
  • Regressing and closing required Low Power coverage metrics to ensure high-quality design
  • Creating portable test setups and verification components that can be reused across simulation and emulation platforms
  • Performing failure debug involving hardware-software co-debug
  • Working with tool vendors and pushing the methodology to improve the verification flows
  • System level RTL simulation and design verification
  • Supporting SoC DV for their integration verification, chip bring-up, and post-silicon debug
Required Skills and Qualifications

To be successful in this role you will need:

  • A Bachelor's degree in Science, Engineering, or a closely related field
  • At least 3 years of hands-on experience in System Verilog, OVM/UVM based constrained random verification
  • At least 3 years of experience in Design validation/Post-Silicon debug
  • At least 3 years of hands-on experience in developing verification components/UVCs and testbenches for RTL verification
  • At least 3 years of hands-on testbench bring-up, integrating third-party VIPs, digital design, verification, debugging, and waveform debug
  • At least 2 years of experience in UPF based Power Aware verification
  • At least 2 years of experience in Functional coverage model development and/or code coverage closure
  • Proficient with low power SoC design constructs such as clock gates, level shifters, isolation cells, and state retention cells
Desirable Skills

Prior experience in the following areas would be beneficial:

  • MS degree in Electrical Engineering or equivalent; 8 years of practical experience
  • Experience with Synopsys NLP (native Low Power) tool
  • Working knowledge of GLS, PAGLS, and scripting languages such as Perl and Python
  • Power Aware Emulation verification experience
  • Hardware/Software Co-verification
  • Experience with Low Power coverage metrics collection and coverage closure
  • Knowledge of GPU/CPU/DDR/Bus preferred
  • Scripting skills using Python
  • Formal verification experience (AND/OR) Low Power Formal Verification experience
Benefits

This position offers a hybrid working model of 3 days onsite and 2 days from home. We prioritize well-being and life balance, allowing employees to blend short-term remote working with annual leave.

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