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High-Speed Digital Design Specialist
3 weeks ago
Job Description:
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- The SerDes PHY team designs products for communication protocols such as PCIe (now at Gen 7) and UCIe (emerging Chiplets standard).">
- Participate in the architecture & implementation of high-speed communication protocols.">
- Work with cross-functional teams ranging from architecture, circuit design, Layout development, RTL design & Validation, Physical design & Test chip development.">
Requirements:
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- BEng, MEng or PhD degree.">
- Candidate's background should include a minimum of 3 years of experience in CMOS SERDES or high-speed I/O IC design and development.">
- Working knowledge of a set of common SERDES standards is desirable.">
- Prior experience in RTL design & synthesis is expected.">
- Excellent problem-solving skills and ability to work cooperatively in a team environment.">
- Excellent communication and stakeholder management skills.">
Key Responsibilities:
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- Design of High Speed SERDES products at data rates up to and exceeding 112 Gbps on leading edge technology nodes.">
- Work with global teams which work in different time-zones.">